Location : Bangalore
Qualification : Engineering Degree in ECE / EEE / EIE
Job Description :
This opening is for a R&D engineer developing library design methodologies. Responsible for developement of design methodology and flows. Requires understanding of Liberty syntax , Verilog/VHDL modeling, Hspice or similar circuit simulation tool. Preferably, this engineer also has knowledge of cell design and schematics. Has strong desires to learn and explore new technologies and demonstrates good analysis and problem-solving skills. Prior knowledge fo software coding a plus.
Typically requires a Bacherloer's degree in EE.
About the company :
Synopsys, Inc. (Nasdaq:SNPS) provides products and services that accelerate innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor intellectual property (IP), Synopsys' comprehensive, integrated portfolio of system-level, IP, implementation, verification, manufacturing, optical and field-programmable gate array (FPGA)solutions help address the key challenges designers face such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in quickly bringing the best products to market while reducing costs and schedule risk. For more than 25 years, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems. The company is headquartered in Mountain View, California, and has approximately 80 offices located throughout North America, Europe, Japan, Asia and India.
Synopsys Corporate Headquarters :
700 East Middlefield RoadMountain View, CA 94043(650) 584-5000(800) 541-7737
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